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Disambiguation of "Bhardwaj, Sarvesh"

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Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic.

, , and . VLSI Design, page 240-. IEEE Computer Society, (2004)

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Secure and Robust Localization in a Wireless Ad Hoc Environment., , and . IEEE Trans. Vehicular Technology, 58 (3): 1480-1489 (2009)Statistical Leakage Minimization of Digital Circuits Using Gate Sizing, Gate Length Biasing, Threshold Voltage Selection., , and . J. Low Power Electronics, 2 (2): 240-250 (2006)An efficient combinationality check technique for the synthesis of cyclic combinational circuits., , , , and . ASP-DAC, page 212-215. ACM Press, (2005)Statistical leakage minimization through joint selection of gate sizes, gate lengths and threshold voltage., , and . ASP-DAC, page 953-958. IEEE, (2006)A framework for statistical timing analysis using non-linear delay and slew models., , and . ICCAD, page 225-230. ACM, (2006)Efficient Algorithms for Identifying the Minimum Leakage States in CMOS Combinational Logic., , and . VLSI Design, page 240-. IEEE Computer Society, (2004)Leakage Minimization of Digital Circuits Using Gate Sizing in the Presence of Process Variations., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (3): 445-455 (2008)Multi-Attribute Optimization with Application to Leakage-Delay Trade-Offs Using Utility Theory., and . J. Low Power Electronics, 4 (1): 68-80 (2008)Modeling of intra-die process variations for accurate analysis and optimization of nano-scale circuits., , , and . DAC, page 791-796. ACM, (2006)LOTUS: Leakage Optimization under Timing Uncertainty for Standard-cell designs., , and . ISQED, page 717-722. IEEE Computer Society, (2006)