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Disambiguation of "Martins, Rui Paulo"

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A 53-to-75-mW, 59.3-dB HRR, TV-Band White-Space Transmitter Using a Low-Frequency Reference LO in 65-nm CMOS.

, , and . J. Solid-State Circuits, 48 (9): 2078-2089 (2013)

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Rui Wang University of Stuttgart

Chantal Ruiz University of Stuttgart

Vanessa Costalonga Martins University of Stuttgart

 

Other publications of authors with the same name

A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW., , , , , and . ISCAS, page 373-376. IEEE, (2013)A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS., , , , , , and . ISSCC, page 188-190. IEEE, (2011)26.5 A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS., , , , and . ISSCC, page 1-3. IEEE, (2015)A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearity., , , , , and . APCCAS, page 33-36. IEEE, (2012)A 10-bit SAR ADC with two redundant decisions and splitted-MSB-cap DAC array., , , and . APCCAS, page 268-271. IEEE, (2012)High performance multirate SC circuits with predictive correlated double sampling technique., , and . ISCAS (2), page 77-80. IEEE, (1999)A novel effective bandpass semi-MASH sigma-delta modulator with double-sampling mismatch-free resonator., , and . ISCAS, IEEE, (2006)A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications., , and . ISCAS (4), page 417-420. IEEE, (2004)Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC., , , , and . IEEE Trans. VLSI Syst., 24 (3): 1203-1207 (2016)Accuracy-Enhanced Variance-Based Time-Skew Calibration Using SAR as Window Detector., , , , and . IEEE Trans. VLSI Syst., 27 (2): 481-485 (2019)