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High performance multirate SC circuits with predictive correlated double sampling technique., , and . ISCAS (2), page 77-80. IEEE, (1999)A novel effective bandpass semi-MASH sigma-delta modulator with double-sampling mismatch-free resonator., , and . ISCAS, IEEE, (2006)A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications., , and . ISCAS (4), page 417-420. IEEE, (2004)A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS., , , , , , and . J. Solid-State Circuits, 45 (6): 1111-1121 (2010)A Time-Interleaved Ring-VCO with Reduced 1/f3 Phase Noise Corner, Extended Tuning Range and Inherent Divided Output., , , and . J. Solid-State Circuits, 51 (12): 2979-2991 (2016)A 5-Bit 1.25-GS/s 4x-Capacitive-Folding Flash ADC in 65-nm CMOS., , , , , and . J. Solid-State Circuits, 48 (9): 2154-2169 (2013)A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures., , , , , and . IEEE Trans. VLSI Syst., 25 (4): 1307-1319 (2017)Accuracy-Enhanced Variance-Based Time-Skew Calibration Using SAR as Window Detector., , , , and . IEEE Trans. VLSI Syst., 27 (2): 481-485 (2019)Experimental 1-V flexible-IF CMOS analoguebaseband chain for IEEE 802.11a/b/g WLAN receivers., , and . IET Circuits, Devices & Systems, 1 (6): 415-426 (2007)An ultra-low-power filtering technique for biomedical applications., , , , , and . EMBC, page 1859-1862. IEEE, (2011)