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Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique.

I. Boybat, C. di Nolfo, S. Ambrogio, M. Bodini, N. Farinha, R. Shelby, P. Narayanan, S. Sidler, H. Tsai, Y. Leblebici, and G. Burr. ICRC, page 1-8. IEEE, (2017)

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Mixed-precision architecture based on computational memory for training deep neural networks.S. Nandakumar, M. Gallo, I. Boybat, B. Rajendran, A. Sebastian, and E. Eleftheriou. ISCAS, page 1-5. IEEE, (2018)Neuromorphic computing with multi-memristive synapses.I. Boybat, M. Gallo, S. Nandakumar, T. Moraitis, T. Parnell, T. Tuma, B. Rajendran, Y. Leblebici, A. Sebastian, and E. Eleftheriou. CoRR, (2017)An efficient synaptic architecture for artificial neural networks.I. Boybat, M. Gallo, S. Nandakumar, T. Moraitis, T. Tuma, B. Rajendran, Y. Leblebici, A. Sebastian, and E. Eleftheriou. NVMTS, page 1-4. IEEE, (2017)Non-volatile memory as hardware synapse in neuromorphic computing: A first look at reliability issues.R. Shelby, G. Burr, I. Boybat, and C. di Nolfo. IRPS, page 6. IEEE, (2015)Impact of conductance drift on multi-PCM synaptic architectures.I. Boybat, S. Nandakumar, M. Gallo, B. Rajendran, Y. Leblebici, A. Sebastian, and E. Eleftheriou. NVMTS, page 1-4. IEEE, (2018)Fatiguing STDP: Learning from spike-timing codes in the presence of rate codes.T. Moraitis, A. Sebastian, I. Boybat, M. Gallo, T. Tuma, and E. Eleftheriou. IJCNN, page 1823-1830. IEEE, (2017)Deep learning acceleration based on in-memory computing.E. Eleftheriou, M. Gallo, S. Nandakumar, C. Piveteau, I. Boybat, V. Joshi, R. Khaddam-Aljameh, M. Dazzi, I. Giannopoulos, G. Karunaratne and 7 other author(s). IBM Journal of Research and Development, 63 (6): 7:1-7:16 (2019)Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.S. Sidler, I. Boybat, R. Shelby, P. Narayanan, J. Jang, A. Fumarola, K. Moon, Y. Leblebici, H. Hwang, and G. Burr. ESSDERC, page 440-443. IEEE, (2016)Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique.I. Boybat, C. di Nolfo, S. Ambrogio, M. Bodini, N. Farinha, R. Shelby, P. Narayanan, S. Sidler, H. Tsai, Y. Leblebici and 1 other author(s). ICRC, page 1-8. IEEE, (2017)Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses.S. Nandakumar, I. Boybat, M. Gallo, E. Eleftheriou, A. Sebastian, and B. Rajendran. CoRR, (2019)

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Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique.

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Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique.