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Output probability density functions of logic circuits: Modeling and fault-tolerance evaluation., , and . VLSI-SoC, page 328-334. IEEE, (2010)Design trade-offs in ultra-low-power CMOS and STSCL digital systems., and . ECCTD, page 544-547. IEEE, (2011)Trinocular adaptive window size disparity estimation algorithm and its real-time hardware., , , , , and . VLSI-DAT, page 1-4. IEEE, (2015)A 16-channel, 359 μW, parallel neural recording system using Walsh-Hadamard coding., , and . CICC, page 1-4. IEEE, (2013)Structured sampling and recovery of iEEG signals., , , , and . CAMSAP, page 269-272. IEEE, (2015)Alternative design methodologies for the next generation logic switch., , , and . ICCAD, page 231-234. IEEE Computer Society, (2011)Integrating bio-sensing functions on CMOS chips., , , , , , and . APCCAS, page 548-551. IEEE, (2010)VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications., , and . ESANN, page 445-450. (2003)Real-time hardware implementation of multi-resolution image blending., , , and . ICASSP, page 2741-2745. IEEE, (2013)A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS., , and . VLSIC, page 180-. IEEE, (2015)