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VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications.

S. Badel, A. Schmid, and Y. Leblebici. ESANN, page 445-450. (2003)

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A Generic Standard Cell Design Methodology for Differential Circuit Styles.S. Badel, E. Guleyupoglu, O. Inac, A. Martinez, P. Vietti, F. Gürkaynak, and Y. Leblebici. DATE, page 843-848. ACM, (2008)Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells.S. Badel, I. Hatirnaz, Y. Leblebici, and E. Brauer. VLSI-SoC, page 234-238. IEEE, (2006)Predictable system interconnects through accurate early wire characterization.I. Hatyrnaz, S. Badel, N. Pazos, and Y. Leblebici. SoCC, page 287-290. IEEE, (2007)A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions.F. Regazzoni, A. Cevrero, F. Standaert, S. Badel, T. Kluter, P. Brisk, Y. Leblebici, and P. Ienne. CHES, volume 5747 of Lecture Notes in Computer Science, page 205-219. Springer, (2009)ARMADILLO: A Multi-purpose Cryptographic Primitive Dedicated to Hardware.S. Badel, N. Dagtekin, J. Jr., K. Ouafi, N. Reffé, P. Sepehrdad, P. Susil, and S. Vaudenay. CHES, volume 6225 of Lecture Notes in Computer Science, page 398-412. Springer, (2010)Early wire characterization for predictable network-on-chip global interconnects.I. Hatirnaz, S. Badel, N. Pazos, Y. Leblebici, S. Murali, D. Atienza, and G. Micheli. SLIP, page 57-64. ACM, (2007)Optimization of Wire Grid Size for Differential Routing and Impact on the Power-delay-area Tradeoff.M. Alioto, S. Badel, and Y. Leblebici. ISCAS, page 1285-1288. IEEE, (2009)Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design.E. Brauer, I. Hatirnaz, S. Badel, and Y. Leblebici. ISCAS, IEEE, (2006)Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture.S. Badel, A. Schmid, and Y. Leblebici. ISCAS (5), page 780-783. IEEE, (2004)A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.F. Regazzoni, S. Badel, T. Eisenbarth, J. Großschädl, A. Poschmann, Z. Deniz, M. Macchetti, L. Pozzi, C. Paar, Y. Leblebici and 1 other author(s). ICSAMOS, page 209-214. IEEE, (2007)

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VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications.

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VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications.