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A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.

, , , , , , , , , , and . ICSAMOS, page 209-214. IEEE, (2007)

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Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells., , , and . VLSI-SoC, page 234-238. IEEE, (2006)A Generic Standard Cell Design Methodology for Differential Circuit Styles., , , , , , and . DATE, page 843-848. ACM, (2008)Predictable system interconnects through accurate early wire characterization., , , and . SoCC, page 287-290. IEEE, (2007)Optimization of Wire Grid Size for Differential Routing and Impact on the Power-delay-area Tradeoff., , and . ISCAS, page 1285-1288. IEEE, (2009)Early wire characterization for predictable network-on-chip global interconnects., , , , , , and . SLIP, page 57-64. ACM, (2007)A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions., , , , , , , and . CHES, volume 5747 of Lecture Notes in Computer Science, page 205-219. Springer, (2009)ARMADILLO: A Multi-purpose Cryptographic Primitive Dedicated to Hardware., , , , , , , and . CHES, volume 6225 of Lecture Notes in Computer Science, page 398-412. Springer, (2010)CMOS realization of two-dimensional mixed analog-digital Hamming distance discriminator circuits for real-time imaging applications., , and . Microelectronics Journal, 39 (12): 1817-1828 (2008)Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture., , and . ISCAS (5), page 780-783. IEEE, (2004)Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design., , , and . ISCAS, IEEE, (2006)