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Disambiguation of "Deniz, Zeynep Toprak"

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A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.

, , , , , , , , , , and . ICSAMOS, page 209-214. IEEE, (2007)

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Deniz Adali University of Stuttgart

Deniz Namli University of Stuttgart

Deniz Kaya University of Stuttgart

Deniz Patrick Frost University of Stuttgart

Zeynep Hazal Yilmaz University of Stuttgart

 

Other publications of authors with the same name

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation., , and . J. Solid-State Circuits, 42 (7): 1593-1606 (2007)A 1.8 pJ/bit 16×16Gb/s Source-Synchronous Parallel Interface in 32 nm SOI CMOS with Receiver Redundancy for Link Recalibration., , , , , , , , , and . J. Solid-State Circuits, 51 (8): 1744-1755 (2016)A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS., , , , , , and . J. Solid-State Circuits, 55 (1): 19-26 (2020)Distributed Network of LDO Microregulators Providing Submicrosecond DVFS and IR Drop Compensation for a 24-Core Microprocessor in 14-nm SOI CMOS., , , , and . J. Solid-State Circuits, 55 (3): 731-743 (2020)A 32 Gb/s, 4.7 pJ/bit Optical Link With -11.7 dBm Sensitivity in 14-nm FinFET CMOS., , , , , , , , , and 2 other author(s). J. Solid-State Circuits, 53 (4): 1214-1226 (2018)Dual-Loop System of Distributed Microregulators With High DC Accuracy, Load Response Time Below 500 ps, and 85-mV Dropout Voltage., , , , , , , , , and 2 other author(s). J. Solid-State Circuits, 47 (4): 863-874 (2012)Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology., , , , , , , , , and 1 other author(s). Trans. Computational Science, (2009)A 1.8V 12-bit 230-MS/s pipeline ADC in 0.18μm CMOS technology., , , , and . APCCAS, page 21-24. IEEE, (2008)A 3.2GS/s 4.55b ENOB two-step subranging ADC in 45nm SOI CMOS., , , , , , , , and . CICC, page 1-4. IEEE, (2012)5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth., , , , , , , , , and 10 other author(s). ISSCC, page 96-97. IEEE, (2014)