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Disambiguation of "Leblebici, Yusuf"

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A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies.

, , , , , , , , , , and . ICSAMOS, page 209-214. IEEE, (2007)

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Wide-Range Dynamic Power Management in Low-Voltage Low-Power Subthreshold SCL., and . IEEE Trans. on Circuits and Systems, 59-II (12): 903-907 (2012)Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology., , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 295-306 (2012)A comparative experimental investigation on responsivity and response speed of photo-diode and photo-BJT structures integrated in a low-cost standard CMOS process., , and . Microelectronics Journal, 46 (11): 997-1001 (2015)Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A Review., , and . Proceedings of the IEEE, 100 (6): 2008-2020 (2012)Integrating bio-sensing functions on CMOS chips., , , , , , and . APCCAS, page 548-551. IEEE, (2010)VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications., , and . ESANN, page 445-450. (2003)Structured sampling and recovery of iEEG signals., , , , and . CAMSAP, page 269-272. IEEE, (2015)Real-time hardware implementation of multi-resolution image blending., , , and . ICASSP, page 2741-2745. IEEE, (2013)ILLIADS: a fast timing and reliability simulator for digital MOS circuits., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 12 (9): 1387-1402 (1993)A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS., , and . VLSIC, page 180-. IEEE, (2015)