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Fast Protection-Domain Crossing in the CHERI Capability-System Architecture., , , , , , , , , and 9 other author(s). IEEE Micro, 36 (5): 38-49 (2016)CHERI Concentrate: Practical Compressed Capabilities., , , , , , , , , and 4 other author(s). IEEE Trans. Computers, 68 (10): 1455-1469 (2019)The CHERI capability model: Revisiting RISC in an age of risk., , , , , , , , , and . ISCA, page 457-468. IEEE Computer Society, (2014)CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization., , , , , , , , , and 5 other author(s). IEEE Symposium on Security and Privacy, page 20-37. IEEE Computer Society, (2015)ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS., , , , , , , , , and 4 other author(s). Proc. ACM Program. Lang., 3 (POPL): 71:1-71:31 (2019)CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment., , , , , , , , , and 11 other author(s). ASPLOS, page 379-393. ACM, (2019)CHERI JNI: Sinking the Java Security Model into the C., , , , , , , , , and 5 other author(s). ASPLOS, page 569-583. ACM, (2017)