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Disambiguation of "Nakaya, Shogo"

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SOP: An Adaptive Massively Parallel Computer and its Control-Data-Flow Based Compiling Method.

, , and . Parcella, volume 96 of Mathematical Research, page 128-136. Akademie Verlag, Berlin, (1996)

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Other publications of authors with the same name

Adaptive sensing of ECG signals using R-R interval prediction., and . EMBC, page 9-12. IEEE, (2013)A Non-volatile Reconfigurable Offloader for Wireless Sensor Nodes., , , , and . IPSJ Trans. System LSI Design Methodology, (2013)Arithmetic Operation Oriented Reconfigurable Chip: RHW., , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 618-622. Springer, (2001)A non-volatile reconfigurable offloader for wireless sensor nodes., , , , and . SIGARCH Computer Architecture News, 40 (5): 87-92 (2012)Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW., , , and . FCCM, page 281-282. IEEE Computer Society, (2000)A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI., , , , , , , , , and 1 other author(s). ICES, volume 1478 of Lecture Notes in Computer Science, page 1-12. Springer, (1998)SOP: An Adaptive Massively Parallel Computer and its Control-Data-Flow Based Compiling Method., , and . Parcella, volume 96 of Mathematical Research, page 128-136. Akademie Verlag, Berlin, (1996)SOP: a reconfigurable massively parallel system and its control-data-flow based compiling method., , and . FCCM, page 148-156. IEEE, (1996)Evolvable Hardware Chip for High Precision Printer Image Compression., , , , , , , and . AAAI/IAAI, page 486-491. AAAI Press / The MIT Press, (1998)Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS., , , , , , , , , and 2 other author(s). ISSCC, page 228-229. IEEE, (2011)