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A Reliable Routing Architecture and Algorithm for NoCs.

, , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (5): 726-739 (2012)

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A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS., , , , and . J. Solid-State Circuits, 49 (11): 2462-2473 (2014)A Reliable Routing Architecture and Algorithm for NoCs., , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 31 (5): 726-739 (2012)Reconfigurable Multicore Server Processors for Low Power Operation., , , , and . SAMOS, volume 5657 of Lecture Notes in Computer Science, page 247-254. Springer, (2009)Assessing the performance limits of parallelized near-threshold computing., , , , , , and . DAC, page 1147-1152. ACM, (2012)A highly resilient routing algorithm for fault-tolerant NoCs., , , , , and . DATE, page 21-26. IEEE, (2009)Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction., , , , , , and . J. Solid-State Circuits, 48 (1): 66-81 (2013)Limits of Parallelism and Boosting in Dim Silicon., , , , , , and . IEEE Micro, 33 (5): 30-37 (2013)Bubble Razor: An architecture-independent approach to timing-error detection and correction., , , , , , and . ISSCC, page 488-490. IEEE, (2012)Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 48 (1): 104-117 (2013)Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores., , , , , , , , , and 5 other author(s). ISSCC, page 190-192. IEEE, (2012)