Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Imposing coarse-grained reconfiguration to general purpose processors.

M. Duric, M. Stanic, I. Ratkovic, O. Palomar, O. Unsal, A. Cristal, M. Valero, and A. Smith. SAMOS, page 42-51. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ivan Solonenko University of Stuttgart

Ivan Buntic University of Stuttgart

Sergio Ivan Caceres Castro University of Stuttgart

Other publications of authors with the same name

An Integrated Vector-Scalar Design on an In-Order ARM Core.M. Stanic, O. Palomar, T. Hayes, I. Ratkovic, A. Cristal, O. Unsal, and M. Valero. TACO, 14 (2): 17:1-17:26 (2017)Joint Circuit-System Design Space Exploration of Multiplier Unit Structure for Energy-Efficient Vector Processors.I. Ratkovic, O. Palomar, M. Stanic, M. Duric, D. Peic, O. Unsal, A. Cristal, and M. Valero. ISVLSI, page 19-26. IEEE Computer Society, (2015)Imposing coarse-grained reconfiguration to general purpose processors.M. Duric, M. Stanic, I. Ratkovic, O. Palomar, O. Unsal, A. Cristal, M. Valero, and A. Smith. SAMOS, page 42-51. IEEE, (2015)A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add Using Active Clock-Gating Techniques.I. Ratkovic, O. Palomar, M. Stanic, O. Unsal, A. Cristal, and M. Valero. ISLPED, page 362-367. ACM, (2016)On the selection of adder unit in energy efficient vector processing.I. Ratkovic, O. Palomar, M. Stanic, O. Unsal, A. Cristal, and M. Valero. ISQED, page 143-150. IEEE, (2013)VALib and SimpleVector: tools for rapid initial research on vector architectures.M. Stanic, O. Palomar, I. Ratkovic, M. Duric, O. Unsal, and A. Cristal. Conf. Computing Frontiers, page 7:1-7:10. ACM, (2014)Physical vs. Physically-Aware Estimation Flow: Case Study of Design Space Exploration of Adders.I. Ratkovic, O. Palomar, M. Stanic, O. Unsal, A. Cristal, and M. Valero. ISVLSI, page 118-123. IEEE Computer Society, (2014)Chapter One - An Overview of Architecture-Level Power- and Energy-Efficient Design Techniques.I. Ratkovic, N. Bezanic, O. Ünsal, A. Cristal, and V. Milutinovic. Advances in Computers, (2015)POSTER: An Integrated Vector-Scalar Design on an In-order ARM Core.M. Stanic, O. Palomar, T. Hayes, I. Ratkovic, O. Unsal, A. Cristal, and M. Valero. PACT, page 447-448. ACM, (2016)Towards low-power embedded vector processor.M. Stanic, O. Palomar, T. Hayes, I. Ratkovic, O. Unsal, and A. Cristal. Conf. Computing Frontiers, page 339-342. ACM, (2016)

PUMA

Disambiguation of "Ratkovic, Ivan"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Imposing coarse-grained reconfiguration to general purpose processors.

Please choose a person to relate this publication to

Ivan Solonenko University of Stuttgart

Ivan Buntic University of Stuttgart

Sergio Ivan Caceres Castro University of Stuttgart

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Ratkovic, Ivan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Imposing coarse-grained reconfiguration to general purpose processors.

Please choose a person to relate this publication to

Ivan Solonenko University of Stuttgart

Ivan Buntic University of Stuttgart

Sergio Ivan Caceres Castro University of Stuttgart

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Imposing coarse-grained reconfiguration to general purpose processors.