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Disambiguation of "Shrivastava, Aviral"

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Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level

, , , , , , , , , , , , , , and . 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, (2023)

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Other publications of authors with the same name

Return Data Interleaving for Multi-Channel Embedded CMPs Systems., , and . IEEE Trans. VLSI Syst., 20 (7): 1351-1354 (2012)Static Analysis of Register File Vulnerability., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 607-616 (2011)UnSync: A Soft Error Resilient Redundant Multicore Architecture., , , , and . ICPP, page 632-641. IEEE Computer Society, (2011)An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs., , , , and . DATE, page 402-408. IEEE Computer Society, (2002)Automatic generation of operation tables for fast exploration of bypasses in embedded processors., , , , , and . DATE, page 1197-1202. European Design and Automation Association, Leuven, Belgium, (2006)Stack data management for Limited Local Memory (LLM) multi-core processors., , and . ASAP, page 231-234. IEEE Computer Society, (2011)Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors., , and . DATE, page 1190-1195. ACM, (2008)Automatic management of Software Programmable Memories in Many-core Architectures., , , , , and . IET Computers & Digital Techniques, 10 (6): 288-298 (2016)Partitioning techniques for partially protected caches in resource-constrained embedded systems., , , and . ACM Trans. Design Autom. Electr. Syst., 15 (4): 30:1-30:30 (2010)WCET-Aware Function-Level Dynamic Code Management on Scratchpad Memory., , and . ACM Trans. Embedded Comput. Syst., 16 (4): 112:1-112:26 (2017)