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Disambiguation of "Jeyapaul, Reiley"

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UnSync: A Soft Error Resilient Redundant Multicore Architecture.

, , , , and . ICPP, page 632-641. IEEE Computer Society, (2011)

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Other publications of authors with the same name

Guidelines to design parity protected write-back L1 data cache., , , , and . DAC, page 24:1-24:6. ACM, (2015)Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors., , , and . DAC, page 13:1-13:6. ACM, (2014)UnSync: A Soft Error Resilient Redundant Multicore Architecture., , , , and . ICPP, page 632-641. IEEE Computer Society, (2011)Cache vulnerability equations for protecting data in embedded processor caches from soft errors., , and . LCTES, page 143-152. ACM, (2010)Code Transformations for TLB Power Reduction., , and . VLSI Design, page 413-418. IEEE Computer Society, (2009)A Software Scheme for Multithreading on CGRAs., , and . ACM Trans. Embedded Comput. Syst., 14 (1): 19:1-19:26 (2015)Soft errors: the hardware-software interface., , and . CODES+ISSS, page 577-578. ACM, (2012)Protecting Caches from Soft Errors: A Microarchitect's Perspective., , , , and . ACM Trans. Embed. Comput. Syst., 16 (4): 93:1-93:28 (2017)Enabling Multithreading on CGRAs., , , , and . ICPP, page 255-264. IEEE Computer Society, (2011)SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures., , , , , and . ASP-DAC, page 776-782. IEEE, (2008)