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Analysis of scheduled Latency insensitive systems with periodic clock calculus., and . HLDVT, page 1-7. IEEE Computer Society, (2009)Nano, quantum, and molecular computing: are we ready for the validation and test challenges?, , , , , and . HLDVT, page 3-7. IEEE Computer Society, (2003)Validating families of latency insensitive protocols., , , and . HLDVT, page 127-134. IEEE Computer Society, (2005)Panel: Assertion-Based Verification -What's the Big Deal?, , , , , , and . HLDVT, page 183. IEEE Computer Society, (2006)MRICDF: A Polychronous Model for Embedded Software Synthesis., and . Synthesis of Embedded Software, Springer, (2010)On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications., , , and . MEMOCODE, page 129-138. IEEE Computer Society, (2008)A New Heuristic for Bad Cycle Detection Using BDDs., , , and . Formal Methods in System Design, 18 (2): 131-140 (2001)Validating Families of Latency Insensitive Protocols., , , and . IEEE Trans. Computers, 55 (11): 1391-1401 (2006)VT Matrix Multiply Design for MEMOCODE '07., , , , and . MEMOCODE, page 95-96. IEEE Computer Society, (2007)Design space exploration for deterministic ethernet-based architecture of automotive systems., , , , , and . HLDVT, page 53-61. IEEE, (2016)