PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Ahuja, Sumit"

Author of the publication

copydeleteadd this publication to your clipboard
VT Matrix Multiply Design for MEMOCODE '07.

, , , , and . MEMOCODE, page 95-96. IEEE Computer Society, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Ahuja, Sumit
add a person with the name Ahuja, Sumit
 

Other publications of authors with the same name

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis., , and . Springer, (2012)SCoPE: Statistical Regression Based Power Models for Co-Processors Power Estimation., , , and . J. Low Power Electronics, 5 (4): 407-415 (2009)MCBCG: Model Checking Based Sequential Clock-Gating., and . HLDVT, page 20-25. IEEE Computer Society, (2009)Power estimation methodology for a high-level synthesis framework., , , , , and . ISQED, page 541-546. IEEE Computer Society, (2009)Applying Verification Collaterals for Accurate Power Estimation., , and . MTV, page 61-66. IEEE Computer Society, (2008)Hardware Coprocessor Synthesis from an ANSI C Specification., , , and . IEEE Design & Test of Computers, 26 (4): 58-67 (2009)Power Aware High Level Synthesis of Hardware Coprocessors., , , and . J. Low Power Electronics, 6 (3): 376-389 (2010)Model-driven test generation for system level validation., , , and . HLDVT, page 83-90. IEEE Computer Society, (2007)Accurate power estimation of hardware co-processors using system level simulation., , , and . SoCC, page 399-402. IEEE, (2009)Techniques for Power-Aware Hardware Synthesis from Concurrent Action Oriented Specifications., , , and . J. Low Power Electronics, 3 (2): 156-166 (2007)