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A 3.2Gbps single-ended receiver using self-reference generation technique for DRAM interface.

, , , and . ICECS, page 671-674. IEEE, (2010)

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Clock- and Data-Recovery Circuit With Independently Controlled Eye-Tracking Loop for High-Speed Graphic DRAMs., and . IEEE Trans. on Circuits and Systems, 58-II (7): 422-426 (2011)A 3.2Gbps single-ended receiver using self-reference generation technique for DRAM interface., , , and . ICECS, page 671-674. IEEE, (2010)10-bit Driver IC Using 3-bit DAC Embedded Operational Amplifier for Spatial Optical Modulators (SOMs)., , , , , , , , , and 5 other author(s). J. Solid-State Circuits, 42 (12): 2913-2922 (2007)A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme., , , , , , , , , and 25 other author(s). ISSCC, page 380-382. IEEE, (2019)A 1.1-V 10-nm Class 6.4-Gb/s/Pin 16-Gb DDR5 SDRAM With a Phase Rotator-ILO DLL, High-Speed SerDes, and DFE/FFE Equalization Scheme for Rx/Tx., , , , , , , , , and 15 other author(s). J. Solid-State Circuits, 55 (1): 167-177 (2020)Forensic acquisition and analysis of palm webOS on mobile devices., , , , and . Digital Investigation, 8 (1): 37-47 (2011)A 10b Driver IC for a Spatial Optical Modulator for Full HDTV Applications., , , , , , , , , and 5 other author(s). ISSCC, page 138-592. IEEE, (2007)Low-Power 10-Gb/s Transmitter for High-Speed Graphic DRAMs Using 0.18-µm CMOS Technology., and . IEEE Trans. on Circuits and Systems, 58-II (12): 921-925 (2011)