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Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen.

, , , , , , , and . MBMV, page 161-170. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)

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Prof. Dr. Thomas Ertl University of Stuttgart

Metaphorical Visualization : Mapping Data to Familiar Concepts, , , , and . CHI EA '22 : Extended Abstracts of the 2022 CHI Conference on Human Factors in Computing Systems, page 10. New York, Association for Computing Machinery, (2022)

Univ. -Prof. Dr. Thomas Graf University of Stuttgart

CW thin-disk laser emitting kW-class beams with radial polarization, , , , , , and . 2017 Conference on Lasers and Electro-Optics Europe & European Quantum Electronics Conference (CLEO/Europe-EQEC), IEEE, (2017)
 

Other publications of authors with the same name

A Flowgraph Semantics of VHDL: Toward a VHDL Verification Workbench in HOL., and . Formal Methods in System Design, 7 (1/2): 73-99 (1995)Abstract Testing: Connecting Source Code Verification with Requirements., , , , and . QUATIC, page 89-96. IEEE Computer Society, (2010)Coverage Driven Verification applied to Embedded Software., , , , , , and . ISVLSI, page 159-164. IEEE Computer Society, (2007)Formal Specification in VHDL for Hardware Verification., , and . DATE, page 257-263. IEEE Computer Society, (1998)The simulation semantics of systemC., , , , , and . DATE, page 64-70. IEEE Computer Society, (2001)Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen., , , , , , , and . MBMV, page 161-170. Institut für Angewandte Mikroelektronik und Datentechnik, Fakultät für Informatik und Elektrotechnik, Universität Rostock, (2013)A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems., , , and . MBMV, page 11-20. HNI-Verlagsschriften, (1998)Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path., , and . EDAC-ETC-EUROASIC, page 648-652. IEEE Computer Society, (1994)A New Model to Uniformly Represent the Function and Timing of MOS Circuits and its Application to VHDL Simulation., and . EDAC-ETC-EUROASIC, page 343-348. IEEE Computer Society, (1994)Formal Data Analysis of Timed Finite State Systems., and . ECRTS, page 257-. IEEE Computer Society, (2002)