Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Sinanoglu, Ozgur
add a person with the name Sinanoglu, Ozgur
 

Other publications of authors with the same name

Test Data Volume Comparison: Monolithic vs. Modular SoC Testing., , , , and . IEEE Design & Test of Computers, 26 (3): 25-37 (2009)Do you trust your chip?. DTIS, page 1. IEEE, (2016)On Improving the Security of Logic Locking., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 35 (9): 1411-1424 (2016)Protect Your Chip Design Intellectual Property: An Overview., , and . COINS, page 211-216. ACM, (2019)X-alignment techniques for improving the observability of response compactors., and . ITC, page 1-10. IEEE Computer Society, (2009)Reducing Average and Peak Test Power Through Scan Chain Modification., , and . J. Electronic Testing, 19 (4): 457-467 (2003)Reconfigurable Concurrent Error Detection Adaptive to Dynamicity of Power Constraints., , and . J. Electronic Testing, 29 (1): 73-86 (2013)On the Application of Dynamic Scan Chain Partitioning for Reducing Peak Shift Power., , and . J. Electronic Testing, 26 (4): 465-481 (2010)Unified 2-D X-Alignment for Improving the Observability of Response Compactors., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (11): 1744-1757 (2011)Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (1): 2-15 (2015)