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Disambiguation of "Chandra, Vikas"

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Leveraging sensitivity analysis for fast, accurate estimation of SRAM dynamic write VMIN.

, , , and . DATE, page 1819-1824. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Alexandros Vikas University of Stuttgart

Chandra Prakash Beura University of Stuttgart

 

Other publications of authors with the same name

Cross layer resiliency in real world., , , and . DATE, page 1. European Design and Automation Association, (2014)Modeling SRAM dynamic VMIN., , , and . ICICDT, page 1-4. IEEE, (2014)Leveraging sensitivity analysis for fast, accurate estimation of SRAM dynamic write VMIN., , , and . DATE, page 1819-1824. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Impact of voltage scaling on nanoscale SRAM reliability., and . DATE, page 387-392. IEEE, (2009)TIMBER: Time borrowing and error relaying for online timing error resilience., , , and . DATE, page 1554-1559. IEEE, (2010)Analytical model for TDDB-based performance degradation in combinational logic., , , and . DATE, page 423-428. IEEE, (2010)Impact of Technology and Voltage Scaling on the Soft Error Susceptibility in Nanoscale CMOS., and . DFT, page 114-122. IEEE Computer Society, (2008)Not All Ops Are Created Equal!, , and . CoRR, (2018)A black box method for stability analysis of arbitrary SRAM cell structures., , , , , , and . DATE, page 795-800. IEEE Computer Society, (2010)A digital dynamic write margin sensor for low power read/write operations in 28nm SRAM., , , and . ISLPED, page 307-310. ACM, (2014)