Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

The Next Generation of Deep Learning Hardware: Analog Computing., , and . Proceedings of the IEEE, 107 (1): 108-122 (2019)Optimizing CMOS technology for maximum performance., , , and . IBM Journal of Research and Development, 50 (4-5): 419-432 (2006)Practical Strategies for Power-Efficient Computing Technologies., , , , , , , and . Proceedings of the IEEE, 98 (2): 215-236 (2010)Efficient ConvNets for Analog Arrays., , , and . CoRR, (2018)Reliability Challenges with Materials for Analog Computing., , , , , , , , , and 8 other author(s). IRPS, page 1-10. IEEE, (2019)Silicon CMOS devices beyond scaling., , , , , , , , , and . IBM Journal of Research and Development, 50 (4-5): 339-362 (2006)High-performance CMOS variability in the 65-nm regime and beyond., , , , , , , , and . IBM Journal of Research and Development, 50 (4-5): 433-450 (2006)An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches., , , , , , , and . J. Solid-State Circuits, 43 (4): 956-963 (2008)Near-threshold operation for power-efficient computing?: it depends..., and . DAC, page 1159-1163. ACM, (2012)Preface., and . IBM Journal of Research and Development, 50 (4-5): 337-338 (2006)