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An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches.

, , , , , , , and . J. Solid-State Circuits, 43 (4): 956-963 (2008)

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Verisym: Verifying Circuits by Symbolic Simulation., , and . Formal Methods in System Design, 22 (2): 163-173 (2003)Limited switch dynamic logic circuits for high-speed low-power circuit design., , , , , , and . IBM Journal of Research and Development, 50 (2-3): 277-286 (2006)An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches., , , , , , , and . J. Solid-State Circuits, 43 (4): 956-963 (2008)Experiences with hybrid clusters., and . CLUSTER, page 1-4. IEEE Computer Society, (2009)WINTER: WAMS in Tim Expression Reduction., , , and . NACLP, page 1013-1029. MIT Press, (1989)Safety-Critical Systems Built with COTS., , , , , , and . IEEE Computer, 29 (11): 54-60 (1996)Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads., , , , , , , , and . ISVLSI, page 68-75. IEEE, (2019)Formal Specification and Verification of VHDL., and . FMCAD, volume 1166 of Lecture Notes in Computer Science, page 310-326. Springer, (1996)Understanding system design for Big Data workloads., , , , , , , , , and . IBM Journal of Research and Development, 57 (3/4): 3 (2013)Feature detection for image analytics via FPGA acceleration., , , , and . IBM Journal of Research and Development, (2015)