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Disambiguation of "Farcy, Alexis"

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Wafer level encapsulated materials evaluation for chip on wafer (CoW) approach in 2.5D Si interposer integration.

, , , , , , , , , , , and . 3DIC, page 1-7. IEEE, (2013)

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Hon. -Prof. Dr. Alexis von Komorowski University of Stuttgart

Yesid Alexis Villota Narváez University of Stuttgart

 

Other publications of authors with the same name

EUROSERVER: Energy Efficient Node for European Micro-Servers., , , , , , , , , and 3 other author(s). DSD, page 206-213. IEEE Computer Society, (2014)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters., , , , , , , , , and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)Thermo-mechanical study of a 2.5D passive silicon interposer technology: Experimental, numerical and In-Situ stress sensors developments., , , , , , , , , and 1 other author(s). 3DIC, page 1-7. IEEE, (2013)ITAC: A complete 3D integration test platform., , , , , , , , , and 10 other author(s). 3DIC, page 1-4. IEEE, (2016)Influence of 3D integration on 2D interconnections and 2D self inductors HF properties., , , , , , and . 3DIC, page 1-6. IEEE, (2009)3D integration demonstration of a wireless product with design partitioning., , , , , , , , , and 17 other author(s). 3DIC, page 1-5. IEEE, (2011)Using TSVs for thermal mitigation in 3D circuits: Wish and truth., , , , , , , , , and 1 other author(s). 3DIC, page 1-8. IEEE, (2014)Device and electromagnetic co-simulation of TSV: Substrate noise study and compact modeling of a TSV in a matrix., , , and . ISQED, page 404-411. IEEE, (2012)Modelling of Through Silicon Via RF performance and impact on signal transmission in 3D integrated circuits., , , , , , , , , and 3 other author(s). 3DIC, page 1-7. IEEE, (2009)Predictive High Frequency effects of substrate coupling in 3D integrated circuits stacking., , , , , , , , , and . 3DIC, page 1-6. IEEE, (2009)