PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Harjani, Ramesh"

Author of the publication

copydeleteadd this publication to your clipboard
A 100MS/s 9-bit Companding SAR ADC with On-Chip Input Driver in 65nm CMOS for Multi-Carrier Communications.

, , and . MWSCAS, page 174-177. IEEE, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Harjani, Ramesh
add a person with the name Harjani, Ramesh
 

Other publications of authors with the same name

Low power implementation of an n-tone Sigma Delta converter., and . ISCAS (1), page 461-464. IEEE, (2004)An ISM band CMOS integrated transceiver design for wireless telemetry system., and . ISCAS (4), page 694-697. IEEE, (2001)Pulse generator design for UWB IR communication systems., , , and . ISCAS (5), page 4381-4384. IEEE, (2005)High-Speed Interconnect Technology: On-Chip and Off-Chip., , and . VLSI Design, page 7. IEEE Computer Society, (2005)A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS., , , , , , , , , and 5 other author(s). IEEE Trans. on Circuits and Systems, 60-I (8): 2009-2017 (2013)Optimal test-set generation for parametric fault detection in switched capacitor filters., , and . Asian Test Symposium, page 72-77. IEEE Computer Society, (2000)A 5Gbps 0.13μm CMOS pilot-based clock and data recovery scheme for high-speed links., , and . CICC, page 125-128. IEEE, (2009)Fully integrated capacitive converter with all digital ripple mitigation., and . CICC, page 1-4. IEEE, (2012)Radio receiver techniques., and . CICC, page 1. IEEE, (2012)Session 19 - Low power and non-traditional RF tranceivers., and . CICC, IEEE, (2008)