Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Locality and Balance for Communication-Aware Thread Mapping in Multicore Systems.

M. Diener, E. da Cruz, M. Alves, M. Alhakeem, P. Navaux, and H. Heiß. Euro-Par, volume 9233 of Lecture Notes in Computer Science, page 196-208. Springer, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

A. Laukemann

Marco Ströbel University of Stuttgart

A. Laukemann

A. Laukemann

A. Vo{\ss}

Other publications of authors with the same name

Introducing Drowsy Technique to Cache Line Usage Predictors.R. Sokulski, E. Carreño, and M. Alves. WSCAD, page 259-265. IEEE, (2018)Evaluating Dead Line Predictors Efficiency with Drowsy Technique.R. Sokulski, E. Carreño, and M. Alves. SBESC, page 250-255. IEEE, (2018)Optimizing Memory Locality Using a Locality-Aware Page Table.E. da Cruz, M. Diener, M. Alves, L. Pilla, and P. Navaux. SBAC-PAD, page 198-205. IEEE Computer Society, (2014)Exploring Cache Size and Core Count Tradeoffs in Systems with Reduced Memory Access Latency.P. Santos, M. Alves, M. Diener, L. Carro, and P. Navaux. PDP, page 388-392. IEEE Computer Society, (2016)Evaluating Thread Placement Based on Memory Access Patterns for Multi-core Processors.M. Diener, F. Madruga, E. Rodrigues, M. Alves, J. Schneider, P. Navaux, and H. Heiss. HPCC, page 491-496. IEEE, (2010)TLP and ILP exploitation through a reconfigurable multiprocessor system.M. Rutzig, F. Madruga, M. Alves, H. de Freitas, A. Beck, N. Maillard, P. Navaux, and L. Carro. IPDPS Workshops, page 1-8. IEEE, (2010)Database Processing-in-Memory: An Experimental Study.T. Kepe, E. de Almeida, and M. Alves. PVLDB, 13 (3): 334-347 (2019)Design of Interleaved Multithreading for Network Processors on Chip.H. Freitas, F. Madruga, M. Alves, and P. Navaux. ISCAS, page 2213-2216. IEEE, (2009)Database Processing-in-Memory: A Vision.T. Kepe, E. de Almeida, M. Alves, and J. Meira. DEXA (1), volume 11706 of Lecture Notes in Computer Science, page 418-428. Springer, (2019)HMC and DDR Performance Trade-offs.P. Santos, M. Alves, and L. Carro. IESS, volume 523 of IFIP Advances in Information and Communication Technology, page 159-171. Springer, (2015)