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Database analytics acceleration using FPGAs., , , , , , , and . PACT, page 411-420. ACM, (2012)High-Throughput, Lossless Data Compresion on FPGAs., , , and . FCCM, page 113-116. IEEE Computer Society, (2011)A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons., , , , , , , , , and 1 other author(s). CICC, page 1-4. IEEE, (2011)A Hardware/Software Approach for Database Query Acceleration with FPGAs., , , , , , and . International Journal of Parallel Programming, 43 (6): 1129-1159 (2015)TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip., , , , , , , , , and 8 other author(s). IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (10): 1537-1557 (2015)Database Analytics: A Reconfigurable-Computing Approach., , , , , , and . IEEE Micro, 34 (1): 19-29 (2014)Large Payload Streaming Database Sort and Projection on FPGAs., , , , , , and . SBAC-PAD, page 25-32. IEEE Computer Society, (2013)Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution., , , , , , , , , and 28 other author(s). SC, page 27-38. IEEE, (2014)Efficient in-system RTL verification and debugging using FPGAs (abstract only)., , , , , and . FPGA, page 269. ACM, (2012)A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation., , , , , , , , , and . FPGA, page 153-162. ACM, (2012)