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TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip.

, , , , , , , , , , , , , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 34 (10): 1537-1557 (2015)

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ExtraV: Boosting Graph Processing Near Storage with a Coherent Accelerator., , , , , , , and . PVLDB, 10 (12): 1706-1717 (2017)Hippocrates: First-Do-No-Harm Detailed Placement., , , , and . ASP-DAC, page 141-146. IEEE Computer Society, (2007)CRISP: Congestion reduction by iterated spreading during placement., , , , and . ICCAD, page 357-362. ACM, (2009)An accurate sparse-matrix based framework for statistical static timing analysis., , , , , and . Integration, 45 (4): 365-375 (2012)ITOP: integrating timing optimization within placement., , , , , , and . ISPD, page 83-90. ACM, (2010)Detecting tangled logic structures in VLSI netlists., , , , , and . DAC, page 603-608. ACM, (2010)Free space management for cut-based placement., , and . ICCAD, page 746-751. ACM / IEEE Computer Society, (2002)New placement prediction and mitigation techniques for local routing congestion., , , , , and . ICCAD, page 621-624. IEEE, (2010)Ispd2009 clock network synthesis contest., , , and . ISPD, page 149-150. ACM, (2009)Smart grid load balancing techniques via simultaneous switch/tie-line/wire configurations., , , , and . ICCAD, page 382-388. IEEE, (2014)