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Disambiguation of "Jutman, Artur"

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Embedded synthetic instruments for Board-Level testing.

, , , and . European Test Symposium, page 1. IEEE Computer Society, (2012)

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Artur Skljarow University of Stuttgart

Artur Schewior University of Stuttgart

Artur Leis University of Stuttgart

Prof. Dr. Artur Pfitzner University of Stuttgart

 

Other publications of authors with the same name

On coverage of timing related faults at board level., , and . ETS, page 1-2. IEEE, (2016)Fault collapsing with linear complexity in digital circuits., , , and . ISCAS, page 653-656. IEEE, (2010)Asynchronous Fault Detection in IEEE P1687 Instrument Network., , and . NATW, page 73-78. IEEE, (2014)Structurally synthesized multiple input BDDs for simulation of digital circuits., , , and . ICECS, page 451-454. IEEE, (2009)Reseeding using compaction of pre-generated LFSR sub-sequences., , , and . ICECS, page 1290-1295. IEEE, (2008)Ultra Fast Parallel Fault Analysis on Structurally Synthesized BDDs., , , and . European Test Symposium, page 131-136. IEEE Computer Society, (2007)A new FPGA-based Detection Method for Spurious Variations in PCBA Power Distribution Network., , , , and . DDECS, page 1-6. IEEE, (2019)Structurally Synthesized Multiple Input BDDs for Speeding Up Logic-Level Simulation of Digital Circuits., , , , and . DSD, page 658-663. IEEE Computer Society, (2010)Timing simulation of digital circuits with binary decision diagrams., , and . DATE, page 460-466. IEEE Computer Society, (2001)Structural fault collapsing by superposition of BDDs for test generation in digital circuits., , , and . ISQED, page 250-257. IEEE, (2010)