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Disambiguation of "Ubar, Raimund"

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Structural fault collapsing by superposition of BDDs for test generation in digital circuits.

, , , and . ISQED, page 250-257. IEEE, (2010)

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Raimund Koop University of Stuttgart

 

Other publications of authors with the same name

PSL Assertion Checking Using Temporally Extended High-Level Decision Diagrams., , , and . J. Electronic Testing, 25 (6): 289-300 (2009)Automated design error debug using high-level decision diagrams and mutation operators., , , , , and . Microprocessors and Microsystems - Embedded Hardware Design, 37 (4-5): 505-513 (2013)Complex delay fault reasoning with sequential 7-valued algebra., , and . LATS, page 1-6. IEEE Computer Society, (2015)Functional Built-In Self-Test for processor cores in SoC., , , , and . NORCHIP, page 1-4. IEEE, (2012)Fast Test Cost Calculation for Hybrid BIST in Digital Systems., , , , and . DSD, page 318-325. IEEE Computer Society, (2001)Hierarchical Identification of Untestable Faults in Sequential Circuits., , , and . DSD, page 668-671. IEEE Computer Society, (2007)Fault Diagnosis in Integrated Circuits with BIST., , , , and . DSD, page 604-610. IEEE Computer Society, (2007)Fault simulation with parallel exact critical path tracing in multiple core environment., , and . DATE, page 1180-1185. ACM, (2015)Parallel X-fault simulation with critical path tracing technique., , , and . DATE, page 879-884. IEEE, (2010)Test Time Minimization for Hybrid BIST of Core-Based Systems., , , , and . Asian Test Symposium, page 318-325. IEEE Computer Society, (2003)