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Cross-Layer Error Resilience and Its Application to Wireless Communication Systems., , and . J. Low Power Electronics, 9 (1): 119-132 (2013)Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung (Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding).. it - Information Technology, 45 (6): 336-343 (2003)Exploration and Optimization of 3-D Integrated DRAM Subsystems., , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 32 (4): 597-610 (2013)Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience., , , , , , , , , and 10 other author(s). Microelectronics Reliability, 54 (6-7): 1066-1074 (2014)FPGA-based rapid prototyping platform for MIMO-BICM design space exploration., , and . ReConFig, page 1-7. IEEE, (2012)Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors ., , and . DATE, page 10356-10363. IEEE Computer Society, (2003)DRAM selection and configuration for real-time mobile systems., , , , and . DATE, page 51-56. IEEE, (2012)An energy efficient DRAM subsystem for 3D integrated SoCs., , , and . DATE, page 1138-1141. IEEE, (2012)Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs., , , , , , , and . DATE, page 495-500. ACM, (2015)Reliability: A Cross-Disciplinary and Cross-Layer Approach.. Asian Test Symposium, page 496-497. IEEE Computer Society, (2011)