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A cache-defect-aware code placement algorithm for improving the performance of processors., and . ICCAD, page 995-1001. IEEE Computer Society, (2005)EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses., , and . DATE, page 1102. IEEE Computer Society, (2002)Charge Recycling in Power-Gated CMOS Circuits., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 27 (10): 1798-1811 (2008)Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection., , , , , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 33 (10): 1573-1590 (2014)Charge recycling in MTCMOS circuits: concept and analysis., , and . DAC, page 97-102. ACM, (2006)ALBORZ: Address Level Bus Power Optimization., , and . ISQED, page 470-475. IEEE Computer Society, (2002)Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis., , and . ASAP, page 202-212. IEEE Computer Society, (2004)A Class of Irredundant Encoding Techniques for Reducing Bus Power., , and . Journal of Circuits, Systems, and Computers, 11 (5): 445-458 (2002)Low-Power Fanout Optimization Using Multi Threshold Voltages and Multi Channel Lengths., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 28 (4): 478-489 (2009)Solving covering problems using LPR-based lower bounds., , and . IEEE Trans. VLSI Syst., 8 (1): 9-17 (2000)