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Neighbor-cell assisted error correction for MLC NAND flash memories.

Y. Cai, G. Yalcin, O. Mutlu, E. Haratsch, O. Unsal, A. Cristal, and K. Mai. SIGMETRICS, page 491-504. ACM, (2014)

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FaulTM: error detection and recovery using hardware transactional memory.G. Yalcin, O. Unsal, and A. Cristal. DATE, page 220-225. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Bit Impact Factor: Towards making fair vulnerability comparison.S. Can, G. Yalcin, O. Ergin, O. Unsal, and A. Cristal. Microprocessors and Microsystems - Embedded Hardware Design, 38 (6): 598-604 (2014)FIMSIM: A fault injection infrastructure for microarchitectural simulators.G. Yalcin, O. Unsal, A. Cristal, and M. Valero. ICCD, page 431-432. IEEE Computer Society, (2011)Hardware Versus Software Fault Injection of Modern Undervolted SRAMs.M. Soyturk, K. Parasyris, B. Salami, O. Unsal, G. Yalcin, and L. Bautista-Gomez. CoRR, (2019)Flexicache: Highly Reliable and Low Power Cache under Supply Voltage Scaling.G. Yalcin, A. Seyedi, O. Unsal, and A. Cristal. CARLA, volume 485 of Communications in Computer and Information Science, page 173-190. Springer, (2014)ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy.S. Rethinagiri, O. Palomar, A. Sobe, T. Knauth, W. Barczynski, G. Yalcin, Y. Hayduk, A. Cristal, O. Unsal, P. Felber and 3 other author(s). DSD, page 191-198. IEEE Computer Society, (2014)Fault tolerance for multi-threaded applications by leveraging hardware transactional memory.G. Yalcin, O. Unsal, and A. Cristal. Conf. Computing Frontiers, page 4:1-4:9. ACM, (2013)JSRAM: A Circuit-Level Technique for Trading-Off Robustness and Capacity in Cache Memories.H. Ahangari, G. Yalcin, O. Ozturk, O. Unsal, and A. Cristal. ISVLSI, page 149-154. IEEE Computer Society, (2015)Designing and Modelling Selective Replication for Fault-tolerant HPC Applications.O. Subasi, G. Yalcin, F. Zyulkyarov, O. Unsal, and J. Labarta. CCGrid, page 452-457. IEEE Computer Society / ACM, (2017)Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm.G. Yalcin, S. Rethinagiri, O. Palomar, O. Ünsal, A. Cristal, and D. Milojevic. PDP, page 184-191. IEEE Computer Society, (2016)

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Neighbor-cell assisted error correction for MLC NAND flash memories.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Neighbor-cell assisted error correction for MLC NAND flash memories.

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Neighbor-cell assisted error correction for MLC NAND flash memories.