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Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC)

W. Wu, H. Ito, J. Anders, A. Ali, and G. Pillonnet. IEEE journal of solid state circuits, 57 (12): 3509-3513 (2022)
DOI: 10.1109/JSSC.2022.3212205

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Mohamed Osama Helal Ahmed University of Stuttgart

Layal Ali University of Stuttgart

A. M. Cooper

Ali Bozkurt University of Stuttgart

Cyber-Physical-Systems for Fluid Manufacturing SystemsA. Bozkurt, C. Fries, T. Tasci, U. Leberle, and D. Kessler. Proceedings of the Conference on Production Systems and Logistics: CPSL 2023, page 640-653. (2023)

Cyber-Physical-Systems for Fluid Manufacturing SystemsA. Bozkurt, C. Fries, T. Tasci, U. Leberle, and D. Kessler. Proceedings of the Conference on Production Systems and Logistics: CPSL 2023, page 640-653. (2023)Exploring the Requirements and Challenges in Production Logistics for Different Sectors of the Manufacturing IndustryA. Bozkurt, R. Weiner, I. Rusch, and R. Schulz. Towards Sustainable Customization: Bridging Smart Products and Manufacturing Systems, page 475–482. Springer International Publishing, (2021)Designing of Smart Logistics Modules as Cyber-physical systems for Load carriersA. Bozkurt, T. Tasci, R. Schulz, and A. Verl. Tagungsband zum 17. Fachkolloquium der Wissenschaftlichen Gesellschaft für Technische Logistik e. V. (WGTL), 17, page 148-155. (2021)

A. Laukemann

Other publications of authors with the same name

High speed pipelined ADCs: Fundamentals and variants.A. Ali. CICC, page 1-145. IEEE, (2018)A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither.A. Ali, H. Dinc, P. Bhoraskar, S. Puckett, A. Morgan, N. Zhu, Q. Yu, C. Dillon, B. Gray, J. Lanford and 7 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A 14-bit 125 MS/s IF/RF sampling pipelined A/D converter.A. Ali, C. Dillon, R. Sneed, A. Morgan, J. Kornblum, L. Wu, and S. Bardsley. CICC, page 391-394. IEEE, (2005)A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration.A. Ali, A. Morgan, C. Dillon, G. Patterson, S. Puckett, P. Bhoraskar, H. Dinc, M. Hensley, R. Stop, S. Bardsley and 4 other author(s). J. Solid-State Circuits, 45 (12): 2602-2612 (2010)Correction of operational amplifier gain error in pipelined A/D converters.A. Ali, and K. Nagaraj. ISCAS (1), page 568-571. IEEE, (2001)Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC)W. Wu, H. Ito, J. Anders, A. Ali, and G. Pillonnet. IEEE journal of solid state circuits, 57 (12): 3509-3513 (2022)A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration.A. Ali, H. Dinc, P. Bhoraskar, C. Dillon, S. Puckett, B. Gray, C. Speir, J. Lanford, J. Brunsilius, P. Derounian and 4 other author(s). J. Solid-State Circuits, 49 (12): 2857-2867 (2014)A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration.A. Ali, A. Morgan, C. Dillon, G. Patterson, S. Puckett, M. Hensley, R. Stop, P. Bhoraskar, S. Bardsley, D. Lattimore and 3 other author(s). ISSCC, page 292-293. IEEE, (2010)