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A 29.5 dBm Class-E Outphasing RF Power Amplifier With Efficiency and Output Power Enhancement Circuits in 45nm CMOS.

, , , and . IEEE Trans. on Circuits and Systems, 64-I (8): 1977-1988 (2017)

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A 20mW 61dB SNDR (60MHz BW) 1b 3rd-order continuous-time delta-sigma modulator clocked at 6GHz in 45nm CMOS., , , , and . ISSCC, page 158-160. IEEE, (2012)A PWM Based Fully Integrated Digital Transmitter/PA for WLAN and LTE Applications., , , , and . J. Solid-State Circuits, 50 (5): 1117-1125 (2015)A 29.5 dBm Class-E Outphasing RF Power Amplifier With Efficiency and Output Power Enhancement Circuits in 45nm CMOS., , , and . IEEE Trans. on Circuits and Systems, 64-I (8): 1977-1988 (2017)Power estimation tool for sub-micron CMOS VLSI circuits., , and . ICCAD, page 204-209. IEEE Computer Society / ACM, (1992)A 110dB SNR and 0.5mW current-steering audio DAC implemented in 45nm CMOS., , , , , , and . ISSCC, page 304-305. IEEE, (2010)Autonomous Vehicles Sensor Needs.. ESSCIRC, page 3. IEEE, (2018)Optimal Datapath Synthesis of Partitioned Signal Processing Algorithm for Multiple FPGAs., and . ICCD, page 587-589. IEEE Computer Society, (1994)A Floorplanner driven by Structural & Timing Constraints., , and . ISCAS, page 157-160. IEEE, (1994)Architectural synthesis for DSP silicon compilers., and . IEEE Trans. on CAD of Integrated Circuits and Systems, 8 (4): 431-447 (1989)A 29.5 dBm class-E outphasing RF power amplifier with performance enhancement circuits in 45nm CMOS., , , , and . ESSCIRC, page 467-470. IEEE, (2014)