%0 Conference Paper %1 conf/isscc/SrinivasanWSHC12 %A Srinivasan, Venkatesh %A Wang, Victoria %A Satarzadeh, Patrick %A Haroun, Baher %A Corsi, Marco %B ISSCC %D 2012 %I IEEE %K dblp %P 158-160 %T A 20mW 61dB SNDR (60MHz BW) 1b 3rd-order continuous-time delta-sigma modulator clocked at 6GHz in 45nm CMOS. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#SrinivasanWSHC12 %@ 978-1-4673-0376-7

@inproceedings{conf/isscc/SrinivasanWSHC12, added-at = {2012-04-18T00:00:00.000+0200}, author = {Srinivasan, Venkatesh and Wang, Victoria and Satarzadeh, Patrick and Haroun, Baher and Corsi, Marco}, biburl = {https://puma.ub.uni-stuttgart.de/bibtex/27b0a44c222fa3684fa5df109cebc1064/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2012}, ee = {http://dx.doi.org/10.1109/ISSCC.2012.6176958}, interhash = {348f06434f1332bc1df6afc721fea5ba}, intrahash = {7b0a44c222fa3684fa5df109cebc1064}, isbn = {978-1-4673-0376-7}, keywords = {dblp}, pages = {158-160}, publisher = {IEEE}, timestamp = {2016-02-02T12:12:51.000+0100}, title = {A 20mW 61dB SNDR (60MHz BW) 1b 3rd-order continuous-time delta-sigma modulator clocked at 6GHz in 45nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2012.html#SrinivasanWSHC12}, year = 2012 }