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Disambiguation of "Wille, Robert"

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Design Automation for Cryogenic CMOS Circuits

, , , , , , , and . 2023 60th ACM/IEEE Design Automation Conference (DAC), IEEE, (2023)
DOI: 10.1109/DAC56929.2023.10247824

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Fabian Willems University of Stuttgart

Univ. -Prof. Dr. -Ing. Robert Schulz University of Stuttgart

Investigation of new criteria for discard detection of fibre ropes for safe operation, , and . Proceedings of OIPEEC Conference 2024, page 83-99. Organisation Internationale pour l'Etude des Cables (OIPEEC), (April 2024)
Investigation of new criteria for discard detection of fibre ropes for safe operation, , and . Proceedings of OIPEEC Conference 2024, page 83-99. Organisation Internationale pour l'Etude des Cables (OIPEEC), (April 2024)Methods for the Calculation of CO2 Emissions in Logistics Activities., and . Heinz Nixdorf Symposium, volume 46 of Lecture Notes in Business Information Processing, page 263-268. Springer, (2010)On the influence of the quasi-static deformation behavior of a wire rope on its fatigue performance, and . Proceedings of OIPEEC Conference 2024, page 313-330. Organisation Internationale pour l'Etude des Cables (OIPEEC), (April 2024)

Robert Henzel University of Stuttgart

Dr. rer. nat. Robert Seyfang University of Stuttgart

Dr. rer. pol. Robert Rose University of Stuttgart

 

Other publications of authors with the same name

Equivalence Checking of Reversible Circuits., , , and . Multiple-Valued Logic and Soft Computing, 19 (4): 361-378 (2012)Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking., , , and . DATE, page 175-180. IEEE, (2016)Towards Reverse Engineering Reversible Logic., , , , , , and . CoRR, (2017)Synthese reversibler Logik (Synthesizing Reversible Logic)., and . it - Information Technology, 52 (1): 30-38 (2010)Simulating Industrial Electrophoretic Deposition on Distributed Memory Architectures., , and . PDP, page 414-421. IEEE, (2019)Generating and checking control logic in the HDL-based design of reversible circuits., , , , and . ISED, page 7-12. IEEE, (2016)Accurate Cost Estimation of Memory Systems Inspired by Machine Learning for Computer Vision., , , , , and . DATE, page 1277-1280. IEEE, (2019)Quantified Synthesis of Reversible Logic., , , and . DATE, page 1015-1020. ACM, (2008)Efficient mapping of quantum circuits to the IBM QX architectures., , and . DATE, page 1135-1138. IEEE, (2018)Scalable design for field-coupled nanocomputing circuits., , , , and . ASP-DAC, page 197-202. ACM, (2019)