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Univ. -Prof. Dr. Ngoc Thang Vu University of Stuttgart

Intrinsic Subgraph Generation for Interpretable Graph Based Visual Question Answering, and . Proceedings of the 2024 Joint International Conference on Computational Linguistics, Language Resources and Evaluation (LREC-COLING 2024), page 9204-9223. ELRA And ICCL, (2024)
Intrinsic Subgraph Generation for Interpretable Graph Based Visual Question Answering, and . Proceedings of the 2024 Joint International Conference on Computational Linguistics, Language Resources and Evaluation (LREC-COLING 2024), page 9204-9223. ELRA And ICCL, (2024)HNC : Leveraging Hard Negative Captions towards Models with Fine-Grained Visual-Linguistic Comprehension Capabilities, , , , and . Proceedings of the 27th Conference on Computational Natural Language Learning (CoNLL), page 364-388. Association For Computational Linguistics, (2023)Please note that I’m just an AI : Analysis of Behavior Patterns of LLMs in (Non-)offensive Speech Identification, , and . Proceedings of the 2024 Conference on Empirical Methods in Natural Language Processing, page 18340-18357. Association For Computational Linguistics, (2024)
 

Other publications of authors with the same name

Robust bias temperature instability refresh design and methodology for memory cell recovery., , , , and . ICICDT, page 1-4. IEEE, (2014)Efficient analog circuit optimization using sparse regression and error margining., , , , and . ISQED, page 410-415. IEEE, (2016)Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices., , , , , , and . Microelectronics Journal, 38 (8-9): 931-941 (2007)Characterizing Hadoop applications on microservers for performance and energy efficiency optimizations., , , , and . ISPASS, page 153-154. IEEE Computer Society, (2016)Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs., , and . ISCAS, page 1-5. IEEE, (2019)"Cool low power" 1GHz multi-port register file and dynamic latch in 1.8 V, 0.25 mum SOI and bulk technology (poster session)., , , and . ISLPED, page 203-206. ACM, (2000)Design Considerations and Implementation of a High Performance Dynamic Register File., and . VLSI Design, page 526-531. IEEE Computer Society, (1999)Design Of Provably Correct Storage Arrays., , and . VLSI Design, page 196-. IEEE Computer Society, (2001)Design technology co-optimization for 10 nm and beyond., and . CICC, page 1. IEEE, (2014)Distributed In-Memory Computing on Binary RRAM Crossbar., , , , and . JETC, 13 (3): 36:1-36:18 (2017)