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Failure analysis and solutions to overcome latchup failure event of a power controller IC in bulk CMOS technology.

, and . Microelectronics Reliability, 46 (7): 1042-1049 (2006)

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Failure analysis and solutions to overcome latchup failure event of a power controller IC in bulk CMOS technology., and . Microelectronics Reliability, 46 (7): 1042-1049 (2006)Impact of local interconnects on ESD design., , , , and . ICICDT, page 1-4. IEEE, (2015)Implementation of Initial-On ESD Protection Concept With PMOS-Triggered SCR Devices in Deep-Submicron CMOS Technology., and . J. Solid-State Circuits, 42 (5): 1158-1168 (2007)Quasi-3D method: Time-efficient TCAD and mixed-mode simulations on finFET technologies., , , , and . CICC, page 1-4. IEEE, (2013)Concise Analytical Expression for Wunsch-Bell 1-D Pulsed Heating and Applications in ESD Using TLP., , , , , , , , , and 2 other author(s). IRPS, page 1-6. IEEE, (2019)CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies., , , , , , , , , and . IRPS, page 1-7. IEEE, (2019)Impact of on- and off-chip protection on the transient-induced latch-up sensitivity of CMOS IC., , , and . Microelectronics Reliability, (2016)Active-lite interposer for 2.5 & 3D integration., , , , , , , , , and 5 other author(s). VLSIC, page 222-. IEEE, (2015)Active ESD protection circuit design against charged-device-model ESD event in CMOS integrated circuits., and . Microelectronics Reliability, 47 (9-11): 1502-1505 (2007)Investigation on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a 0.13-µm CMOS technology., and . Microelectronics Reliability, 50 (6): 821-830 (2010)