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Gzip on a chip: high performance lossless data compression on FPGAs using OpenCL.

, , and . IWOCL, page 4:1-4:9. ACM, (2014)

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Gzip on a chip: high performance lossless data compression on FPGAs using OpenCL., , and . IWOCL, page 4:1-4:9. ACM, (2014)FPGA PLB Architecture Evaluation and Area Optimization Techniques Using Boolean Satisfiability., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (7): 1196-1210 (2007)A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs., , , , , , and . FPGA, page 167-176. ACM, (2010)Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms., and . ASP-DAC, page 297-304. IEEE, (2013)Automated Extraction of Physical Hierarchies for Performance Improvement on Programmable Logic Devices., , and . VLSI, page 28-33. CSREA Press, (2003)Post-Placement BDD-Based Decomposition for FPGAs., , and . FPL, page 31-38. IEEE, (2005)Integrated retiming and placement for field programmable gate arrays., and . FPGA, page 67-76. ACM, (2002)Incremental placement for structured ASICs using the transportation problem., , and . VLSI-SoC, page 172-177. IEEE, (2007)The case for registered routing switches in field programmable gate arrays., and . FPGA, page 161-169. ACM, (2001)Incremental retiming for FPGA physical synthesis., , and . DAC, page 433-438. ACM, (2005)