Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.

D. Moss, K. Srivatsan, E. Nurvitadhi, P. Ratuszniak, C. Johnson, J. Sim, A. Mishra, D. Marr, S. Subhaschandra, and P. Leong. FPGA, page 107-116. ACM, (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Nurvitadhi, Eriko

add a person with the name Nurvitadhi, Eriko

Other publications of authors with the same name

Fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference.S. Hurkat, J. Choi, E. Nurvitadhi, J. Martínez, and R. Rutenbar. FPL, page 1-8. IEEE, (2015)Accelerating recurrent neural networks in analytics servers: Comparison of FPGA, CPU, GPU, and ASIC.E. Nurvitadhi, J. Sim, D. Sheffield, A. Mishra, S. Krishnan, and D. Marr. FPL, page 1-4. IEEE, (2016)Accelerating Deep Convolutional Networks using low-precision and sparsity.G. Venkatesh, E. Nurvitadhi, and D. Marr. CoRR, (2016)Design, implementation, and verification of active cache emulator (ACE).J. Hong, E. Nurvitadhi, and S. Lu. FPGA, page 63-72. ACM, (2006)Evaluating The Highly-Pipelined Intel Stratix 10 FPGA Architecture Using Open-Source Benchmarks.T. Tan, E. Nurvitadhi, D. Shih, and D. Chiou. FPT, page 206-213. IEEE, (2018)Programmable Automotive Headlights.R. Tamburo, E. Nurvitadhi, A. Chugh, M. Chen, A. Rowe, T. Kanade, and S. Narasimhan. ECCV (4), volume 8692 of Lecture Notes in Computer Science, page 750-765. Springer, (2014)Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs.Z. Que, H. Nakahara, E. Nurvitadhi, A. Boutros, H. Fan, C. Zeng, J. Meng, K. Tsoi, X. Niu, and W. Luk. IEEE Trans. Very Large Scale Integr. Syst., 30 (2): 227-237 (2022)Active Cache Emulator.E. Nurvitadhi, J. Hong, and S. Lu. IEEE Trans. VLSI Syst., 16 (3): 229-240 (2008)Dynamic voltage scaling techniques for power efficient video decoding.B. Lee, E. Nurvitadhi, R. Dixit, C. Yu, and M. Kim. Journal of Systems Architecture, 51 (10-11): 633-652 (2005)Automatic Pipelining From Transactional Datapath Specifications.E. Nurvitadhi, J. Hoe, T. Kam, and S. Lu. IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (3): 441-454 (2011)

PUMA

Disambiguation of "Nurvitadhi, Eriko"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

PUMA

Disambiguation of "Nurvitadhi, Eriko"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.

Please choose a person to relate this publication to

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.