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Interpolation with Guided Refinement: Revisiting incrementality in SAT-based unbounded model checking., , and . FMCAD, page 43-50. IEEE, (2014)A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem., , , , , and . CPM, volume 54 of LIPIcs, page 11:1-11:8. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, (2016)Test Time Minimization in Reconfigurable Scan Networks., , , and . ATS, page 119-124. IEEE Computer Society, (2016)Fast cone-of-influence computation and estimation in problems with multiple properties., , , , , , , and . DATE, page 803-806. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3., , and . DIFTS@FMCAD, volume 1130 of CEUR Workshop Proceedings, CEUR-WS.org, (2013)A Greedy Approach to Answer Reachability Queries on DAGs., , , , , and . CoRR, (2016)Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper)., , , , and . SEFM, volume 10469 of Lecture Notes in Computer Science, page 382-387. Springer, (2017)Test of Reconfigurable Modules in Scan Networks., , , , , and . IEEE Trans. Computers, 67 (12): 1806-1817 (2018)Logic Synthesis for Interpolant Circuit Compaction., , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 38 (2): 380-384 (2019)Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening., , , , and . FMCAD, page 25-32. IEEE, (2016)