Author of the publication

Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads.

, , , , and . IISWC, page 38-49. IEEE Computer Society, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Low-Power Reconfigurable Network Architecture for On-Chip Photonic Interconnects., , , , , and . Hot Interconnects, page 163-169. IEEE Computer Society, (2009)RecoNoC: A reconfigurable network-on-chip., , , , and . ReCoSoC, page 1-2. IEEE, (2011)Fairness-aware scheduling on single-ISA heterogeneous multi-cores., , , , and . PACT, page 177-187. IEEE Computer Society, (2013)PCantorSim: Accelerating parallel architecture simulation through fractal-based sampling., , , , , , , and . TACO, 10 (4): 49:1-49:24 (2013)Many-core graph workload analysis., , , , and . SC, page 22:1-22:11. IEEE / ACM, (2018)Scale-Model Simulation., , , , and . IEEE Comput. Archit. Lett., 20 (2): 175-178 (2021)Predicting the performance of reconfigurable optical interconnects in distributed shared-memory systems., , , , , , and . Photonic Network Communications, 15 (1): 25-40 (2008)Evaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy., , , and . Euro-Par Workshops (2), volume 7156 of Lecture Notes in Computer Science, page 272-281. Springer, (2011)Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior., , , , , , and . ISPA Workshops, volume 4331 of Lecture Notes in Computer Science, page 311-321. Springer, (2006)Strategies for dynamic memory allocation in hybrid architectures., , and . Conf. Computing Frontiers, page 217-220. ACM, (2009)