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Disambiguation of "Carlson, Trevor E."

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PCantorSim: Accelerating parallel architecture simulation through fractal-based sampling.

, , , , , , , and . TACO, 10 (4): 49:1-49:24 (2013)

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E. Garrelts

E. Zafeiriou

P. E. Bl\"ochl

Andr{\'{e}} Buchau

Umm-E Habiba University of Stuttgart

 

Other publications of authors with the same name

CoolSim: Eliminating traditional cache warming with fast, virtualized profiling., , , and . ISPASS, page 149-150. IEEE Computer Society, (2016)CoolSim: Statistical techniques to replace cache warming with efficient, virtualized profiling., , , and . SAMOS, page 106-115. IEEE, (2016)Using cycle stacks to understand scaling bottlenecks in multi-threaded workloads., , , , and . IISWC, page 38-49. IEEE Computer Society, (2011)Generic Multiphase Software Pipelined Partial FFT on Instruction Level Parallel Architectures., , , , , and . IEEE Trans. Signal Processing, 57 (4): 1604-1615 (2009)Power-aware multi-core simulation for early design stage hardware/software co-optimization., , , , and . PACT, page 3-12. ACM, (2012)Evaluating Application Vulnerability to Soft Errors in Multi-level Cache Hierarchy., , , and . Euro-Par Workshops (2), volume 7156 of Lecture Notes in Computer Science, page 272-281. Springer, (2011)Non-Speculative Load-Load Reordering in TSO., , , and . ISCA, page 187-200. ACM, (2017)System-level power/performance evaluation of 3D stacked DRAMs for mobile applications., , , , , , , and . DATE, page 923-928. IEEE, (2009)Maximizing Limited Resources: a Limit-Based Study and Taxonomy of Out-of-Order Commit., , , and . Signal Processing Systems, 91 (3-4): 379-397 (2019)Full Speed Ahead: Detailed Architectural Simulation at Near-Native Speed., , , , , and . IISWC, page 183-192. IEEE Computer Society, (2015)