PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Ambrose, Jude Angelo"

Author of the publication

copydeleteadd this publication to your clipboard
A Study on Instruction-set Selection Using Multi-application Based Application Specific Instruction-set Processors.

, , , and . VLSI Design, page 7-12. IEEE Computer Society, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jude Al Issa Zada University of Stuttgart

 

Other publications of authors with the same name

Improving GA-Based NoC Mapping Algorithms Using a Formal Model., , and . ISVLSI, page 344-349. IEEE Computer Society, (2014)CoRaS: A multiprocessor key corruption and random round swapping for power analysis side channel attacks: A DES case study., , and . ISCAS, page 253-256. IEEE, (2012)Variable increment step based reconfigurable interleaver for multimode communication application., , and . ISCAS, page 73-76. IEEE, (2013)ARCHER: Communication-based predictive architecture selection for application specific multiprocessor Systems-on-Chip., , , , , , , and . ISCAS, page 413-416. IEEE, (2015)Fine-grained hardware/software methodology for process migration in MPSoCs., , and . ICCAD, page 508-515. ACM, (2012)MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm., , and . ICCAD, page 678-684. IEEE Computer Society, (2008)Processor Design for Soft Errors: Challenges and State of the Art., , , and . ACM Comput. Surv., 49 (3): 57:1-57:44 (2016)A double-width algorithmic balancing to prevent power analysis Side Channel Attacks in AES., , , and . ISVLSI, page 76-83. IEEE Computer Socity, (2013)MAPro: A Tiny Processor for Reconfigurable Baseband Modulation Mapping., , and . VLSI Design, page 1-6. IEEE Computer Society, (2013)Efficient implementation of multi-moduli architectures for Binary-to-RNS conversion., , and . ASP-DAC, page 819-824. IEEE, (2012)