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Effective Reconfigurable Design: The FASTER Approach., , , , , , , , , and 3 other author(s). ARC, volume 8405 of Lecture Notes in Computer Science, page 318-323. Springer, (2014)A Fully Parameterized Virtual Coarse Grained Reconfigurable Array for High Performance Computing Applications., , , , and . IPDPS Workshops, page 265-270. IEEE Computer Society, (2016)Using the arithmetic representation properties of data to reduce the area and power consumption of FFT circuits for wireless OFDM systems., and . SiPS, page 7-12. IEEE, (2011)An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes., , and . DATE, page 709-714. IEEE, (2012)A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project., , , , , , , , and . ISVLSI, page 368-373. IEEE Computer Society, (2017)FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration., , , , , , , , , and 5 other author(s). DSD, page 234-241. IEEE Computer Society, (2012)Using hardware-based forward error correction to reduce the overall energy consumption of WSNs., and . WCNC, page 2191-2196. IEEE, (2012)A Fully Parameterized Virtual Coarse Grained Reconfigurable Array for High Performance Computing Applications., , , , and . IPDPS Workshops, page 265-270. IEEE Computer Society, (2016)EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures., , , , , , , , , and 9 other author(s). ReCoSoC, page 1-7. IEEE, (2016)EXTRA: an open platform for reconfigurable architectures., , , , , , , , , and 3 other author(s). SAMOS, page 220-229. ACM, (2018)