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EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.

D. Stroobandt, A. Varbanescu, C. Ciobanu, M. Kadi, A. Brokalakis, G. Charitopoulos, T. Todman, X. Niu, D. Pnevmatikatos, A. Kulkarni, E. Vansteenkiste, W. Luk, M. Santambrogio, D. Sciuto, M. Hübner, T. Becker, G. Gaydadjiev, A. Nikitakis, and A. Thom. ReCoSoC, page 1-7. IEEE, (2016)

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Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems.T. Chau, X. Niu, A. Eele, J. Maciejowski, P. Cheung, and W. Luk. TRETS, 7 (4): 36:1-36:17 (2015)EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.D. Stroobandt, A. Varbanescu, C. Ciobanu, M. Kadi, A. Brokalakis, G. Charitopoulos, T. Todman, X. Niu, D. Pnevmatikatos, A. Kulkarni and 9 other author(s). ReCoSoC, page 1-7. IEEE, (2016)Automating resource optimisation in reconfigurable design (abstract only).X. Niu, T. Chau, Q. Jin, W. Luk, and Q. Liu. FPGA, page 275. ACM, (2013)Automatic Optimising CNN with Depthwise Separable Convolution on FPGA: (Abstact Only).R. Zhao, X. Niu, and W. Luk. FPGA, page 285. ACM, (2018)EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access.X. Niu, W. Luk, and Y. Wang. FPGA, page 74-83. ACM, (2015)Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications.T. Chau, X. Niu, A. Eele, W. Luk, P. Cheung, and J. Maciejowski. ARC, volume 7806 of Lecture Notes in Computer Science, page 1-12. Springer, (2013)Memory-Efficient Architecture for Accelerating Generative Networks on FPGA.S. Liu, C. Zeng, H. Fan, H. Ng, J. Meng, Z. Que, X. Niu, and W. Luk. FPT, page 30-37. IEEE, (2018)Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation.H. Fan, H. Ng, S. Liu, Z. Que, X. Niu, and W. Luk. FPL, page 287-294. IEEE Computer Society, (2018)DeepPump: Multi-pumping deep Neural Networks.R. Zhao, T. Todman, W. Luk, and X. Niu. ASAP, page 206. IEEE Computer Society, (2017)Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration.K. Papadimitriou, C. Pilato, D. Pnevmatikatos, M. Santambrogio, C. Ciobanu, T. Todman, T. Becker, T. Davidson, X. Niu, G. Gaydadjiev and 2 other author(s). CSE, page 391-398. IEEE Computer Society, (2012)

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EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.

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copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.

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EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.