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High-Level Synthesis for FPGAs: From Prototyping to Deployment.

J. Cong, B. Liu, S. Neuendorffer, J. Noguera, K. Vissers, and Z. Zhang. IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 473-491 (2011)

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Development Framework for Implementing FPGA-Based Cognitive Network Nodes.J. Lotze, S. Fahmy, J. Noguera, B. Özgül, L. Doyle, and R. Esser. GLOBECOM, page 1-7. IEEE, (2009)High-Level Synthesis for FPGAs: From Prototyping to Deployment.J. Cong, B. Liu, S. Neuendorffer, J. Noguera, K. Vissers, and Z. Zhang. IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 473-491 (2011)Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools.K. Vissers, S. Neuendorffer, and J. Noguera. DATE, page 848-850. IEEE, (2011)Power Reduction in Network Equipment through Adaptive Partial Reconfiguration.J. Noguera, and I. Kennedy. FPL, page 240-245. IEEE, (2007)OmpSs@Zynq all-programmable SoC ecosystem.A. Filgueras, E. Gil, D. Jiménez-González, C. Álvarez, X. Martorell, J. Langer, J. Noguera, and K. Vissers. FPGA, page 137-146. ACM, (2014)Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs.M. Hübner, D. Göhringer, J. Noguera, and J. Becker. IPDPS Workshops, page 1-8. IEEE, (2010)System-level power-performance trade-offs in task scheduling for dynamically reconfigurable architectures.J. Noguera, and R. Badia. CASES, page 73-83. ACM, (2003)Software-programmable digital pre-distortion on the Zynq SoC.B. Özgül, J. Langer, J. Noguera, and K. Vissers. VLSI-SoC, page 288-289. IEEE, (2013)Multi-platform demonstrations using the Iris architecture for cognitive radio network testbeds.P. Sutton, J. Lotze, H. Lahlou, B. Özgül, S. Fahmy, K. Nolan, J. Noguera, and L. Doyle. CrownCom, page 1-5. ICST / IEEE, (2010)Generic Software Framework for Adaptive Applications on FPGAs.S. Fahmy, J. Lotze, J. Noguera, L. Doyle, and R. Esser. FCCM, page 55-62. IEEE Computer Society, (2009)

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High-Level Synthesis for FPGAs: From Prototyping to Deployment.

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Disambiguation of "Noguera, Juanjo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML High-Level Synthesis for FPGAs: From Prototyping to Deployment.

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High-Level Synthesis for FPGAs: From Prototyping to Deployment.