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High-Level Synthesis for FPGAs: From Prototyping to Deployment.

, , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 473-491 (2011)

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FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing., , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 26 (2): 254-265 (2007)Parallel Programming for FPGAs., , and . CoRR, (2018)Taming heterogeneity - the Ptolemy approach., , , , , , , , and . Proceedings of the IEEE, 91 (1): 127-144 (2003)Building zynq® accelerators with Vivado® high level synthesis., and . FPGA, page 1-2. ACM, (2013)Modeling Real-World Control Systems: Beyond Hybrid Systems.. Winter Simulation Conference, page 240-248. IEEE Computer Society, (2004)Reprogrammable Platforms for High-Speed Data Acquisition., , , and . Design Autom. for Emb. Sys., 7 (4): 341-364 (2002)High-Level Synthesis for FPGAs: From Prototyping to Deployment., , , , , and . IEEE Trans. on CAD of Integrated Circuits and Systems, 30 (4): 473-491 (2011)Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools., , and . DATE, page 848-850. IEEE, (2011)Combining module selection and resource sharing for efficient FPGA pipeline synthesis., , and . FPGA, page 179-188. ACM, (2006)High level synthesis for FPGAs applied to a sphere decoder channel preprocessor (abstract only)., , , and . FPGA, page 278. ACM, (2011)