PUMA

academical publication management
collect, organize, and share publications

( en | de )

 

Disambiguation of "Vissers, Kees A."

Author of the publication

copydeleteadd this publication to your clipboard
Software-programmable digital pre-distortion on the Zynq SoC.

, , , and . VLSI-SoC, page 288-289. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

A. Laukemann

A. Laukemann

A. Laukemann

A. Vo{\ss}

A. Afkari

 

Other publications of authors with the same name

IEEE-Compliant IDCT on FPGA-Augmented TriMedia., , , , and . VLSI Signal Processing, 39 (3): 195-212 (2005)A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems., , , and . VLSI Signal Processing, 29 (3): 197-207 (2001)MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor., , , , and . ICCD, page 425-430. IEEE Computer Society, (2001)An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures., , , and . ASAP, page 338-349. IEEE Computer Society, (1997)Achieving 10Gbps Line-rate Key-value Stores with FPGAs., , , , , and . HotCloud, USENIX Association, (2013)Optimized Generation of Data-Path from C Codes for FPGAs, , , and . CoRR, (2007)Developing Architectural Platforms: A Disciplined Approach., , , , , , , , , and 1 other author(s). IEEE Design & Test of Computers, 19 (6): 6-16 (2002)Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications., , , , and . IEEE International Workshop on Rapid System Prototyping, page 246-249. IEEE Computer Society, (2005)A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach., , , and . Embedded Processor Design Challenges, volume 2268 of Lecture Notes in Computer Science, page 18-37. Springer, (2002)Versal: The Xilinx Adaptive Compute Acceleration Platform (ACAP).. FPGA, page 83. ACM, (2019)